This invention relates to a semiconductor device such as a bipolar transistor, ICs, or LSIs. This invention also relates to a method of fabricating such a semiconductor device.
Various self-aligned process technologies have been developed to realize Si bipolar ICs which can operate at high speeds. The self-aligned process technologies enable finer structures of ICs, and smaller parasitic capacitances and resistances of transistors.
ELECTRONICS LETTERS, Apr. 14, 1983, Vol. 19 No. 8, pages 283-284, discloses a practical bipolar logic circuit which has been made with advanced super self-aligned process technology.
The digest of papers in the National Meeting 1987 of the semiconductor and material part of Japan Electronic Information Communication Society, pages 1-330 to 1-331, discloses a revised version of the advanced super self-aligned process technology. In this revised version, phosphorus ions are selectively implanted into only collector regions immediately below emitter regions and thus the profile of intrinsic base-collector impurities is controlled so that a selectively ion-implanted collector (SIC) is formed. ICs of such a SIC structure have advantages such as narrower base widths, higher collector cut-off frequencies, higher current densities, and lower intrinsic base resistances. These advantages enable higher IC operation speeds. As will be explained later, this revised version still has a problem.